This unit consists of a Four-Slot VPX based mother board (Developed In House) and four daughter boards...
The DF/LPI-DF Processor is specifically designed to process videos generated by week RF signals (either CW or large pulse widths) which are radiated by different types Radars including LPI RADARS.
The Receiver processor unit accepts the pulse to pulse data (like Frequency, Pulse width, Amplitude, Direction of Arrival, time of Arrival etc.)
The Data Processing Unit is Virtex–5 (XC5VFX200T-1FF1738I) FPGA based embedded system designed and developed for processing the raw information from the front end system to a 128bit Signal Descriptor Word.
The Automated Test-jig for Avionics unit is Virtex–5 FPGA based embedded system designed and developed for simultaneously testing four Avionic sub-systems with MIL-STD-1553 interfaces.
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